Module Circuit.Config

type t = {
detect_combinational_loops : Base.bool;(*

Check circuit for combinational loops (cyclic paths that do not pass through a register or memory).

*)
normalize_uids : Base.bool;(*

Renumber the Uids of all signals in the circuit starting at one.

Uid normalization ensures that circuits will print the same (as sexps or rtl) regardless of the environment in which they are constructed (in particular with regard to the global uid generator).

*)
assertions : Assertion_manager.t Base.option;
port_checks : Port_checks.t;(*

Perform validation checks on inputs and outputs (With_interface only)

*)
add_phantom_inputs : Base.bool;(*

Add inputs defined in an Interface but not used within the Circuit (With_interface only).

*)
modify_outputs : Signal.t Base.list -> Signal.t Base.list;(*

Map over circuit outputs just before constructing the circuit.

*)
}
val default : t

Perform combination loop checking, normalize uids, Relaxed port checks, and add phantom inputs.