Module Hardcaml_ntt.Controller

NTT transform controller.

Initially we read from the input RAM which is indicated through first_stage. We then iterate by reading and writing to the tranpose RAMs. On last_stage we write to the output RAM.

Additionally, the optional twiddle stage is performed. This performs an extra pass through the coefficients neccessary to implement the NTT 4 step algorithm.

The controller flushes the pipeline after each ntt stage, and flips the Brams.

After each pass of the NTT, the controller allows the twiddle factors to be updated by the multipliers in the datapath.

module Make (Config : Core_config.S) : sig ... end