Hardcaml.Circuit_utilization
Utilization information for a circuit which can be printed to a sexp.
It tries to balance summarizing different node types to provide an overview of both usage and the potential implication on the critical path without being overly detailed.
and
, or
, xor
and not
gates just print the total number of bits.
adder
, subtractors
, multipliers
and comparators
show the total number of bits and the largest single node.
multiplexers
are grouped by depth and show the total number of bits and largest data width in each group.
memories
are grouped by their aspect ratio - data width and depth.
instantiations
are recursively processed if present in an optional Circuit_database.t
.
module Total_bits : sig ... end
module Total_and_max_bits : sig ... end
module Multiplexer : sig ... end
module Multiplexers : sig ... end
module Memory : sig ... end
module Memories : sig ... end
module Instantiation : sig ... end
module Instantiations : sig ... end
type t = {
name : Base.string; |
adders : Total_and_max_bits.t Base.option; |
subtractors : Total_and_max_bits.t Base.option; |
unsigned_multipliers : Total_and_max_bits.t Base.option; |
signed_multipliers : Total_and_max_bits.t Base.option; |
and_gates : Total_bits.t Base.option; |
or_gates : Total_bits.t Base.option; |
xor_gates : Total_bits.t Base.option; |
not_gates : Total_bits.t Base.option; |
equals : Total_and_max_bits.t Base.option; |
comparators : Total_and_max_bits.t Base.option; |
multiplexers : Multiplexers.t Base.option; |
registers : Total_bits.t Base.option; |
memories : Memories.t Base.option; |
constants : Total_bits.t Base.option; |
wires : Total_bits.t Base.option; |
concatenation : Total_bits.t Base.option; |
part_selects : Total_bits.t Base.option; |
instantiations : t Instantiations.t Base.option; |
}
val sexp_of_t : t -> Sexplib0.Sexp.t
val create : ?database:Circuit_database.t -> Circuit.t -> t
Calculate the utilization of gates, rams, registers. If database
is provided instantiations are recursively calculated as well.