Make (hardcaml_circuits.Hardcaml

Parameters

module Arg : Arg

Signature

type t

type op = {

`slot : Hardcaml.Signal.t;`	(* Slot to perform operation at *)
`op : Hardcaml.Signal.t;`	(* Operation type (insert, remove or nothing) *)
`insert_data : Hardcaml.Signal.t Arg.Interface.t;`	(* Data to insert into the vec *)
`delete_data : Hardcaml.Signal.t Arg.Interface.t;`	(* Data written to the emptied slot in the vec *)

}

Operation performed on the vec circuit.

val create : 
  Hardcaml.Reg_spec.t ->
  vec_size:Base.int ->
  next:
    ( index:Base.int ->
      Hardcaml.Signal.t Arg.Interface.t ->
      Hardcaml.Signal.t Arg.Interface.t ) ->
  op ->
  t

Create the vec with the given size.

next defines a function which can set the register when not performing an insert or delete operation.

val get : t -> index:Base.int -> Hardcaml.Signal.t Arg.Interface.t

Get the value at the given index.

val read_mux : 
  t ->
  index:Hardcaml.Signal.t ->
  Hardcaml.Signal.t Arg.Interface.t

Create a read multiplexer

val vec_size : t -> Base.int

Size of vec