Variants (hardcaml.Hardcaml.Parameter.Value.Variants)

val bit : ( Base.bool -> t ) Variantslib.Variant.t

val bit_vector : ( Bit_vector.t -> t ) Variantslib.Variant.t

val bool : ( Base.bool -> t ) Variantslib.Variant.t

val int : ( Base.int -> t ) Variantslib.Variant.t

val real : ( Base.float -> t ) Variantslib.Variant.t

val std_logic : ( Std_logic.t -> t ) Variantslib.Variant.t

val std_logic_vector : ( Std_logic_vector.t -> t ) Variantslib.Variant.t

val std_ulogic : ( Std_logic.t -> t ) Variantslib.Variant.t

val std_ulogic_vector : ( Std_logic_vector.t -> t ) Variantslib.Variant.t

val string : ( Base.string -> t ) Variantslib.Variant.t

val fold : 
  init:'acc__ ->
  bit:( 'acc__ -> ( Base.bool -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  bit_vector:
    ( 'acc__ -> ( Bit_vector.t -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  bool:( 'acc__ -> ( Base.bool -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  int:( 'acc__ -> ( Base.int -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  real:( 'acc__ -> ( Base.float -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  std_logic:( 'acc__ -> ( Std_logic.t -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  std_logic_vector:
    ( 'acc__ -> ( Std_logic_vector.t -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  std_ulogic:( 'acc__ -> ( Std_logic.t -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  std_ulogic_vector:
    ( 'acc__ -> ( Std_logic_vector.t -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  string:( 'acc__ -> ( Base.string -> t ) Variantslib.Variant.t -> 'acc__ ) ->
  'acc__

val iter : 
  bit:( ( Base.bool -> t ) Variantslib.Variant.t -> Base.unit ) ->
  bit_vector:( ( Bit_vector.t -> t ) Variantslib.Variant.t -> Base.unit ) ->
  bool:( ( Base.bool -> t ) Variantslib.Variant.t -> Base.unit ) ->
  int:( ( Base.int -> t ) Variantslib.Variant.t -> Base.unit ) ->
  real:( ( Base.float -> t ) Variantslib.Variant.t -> Base.unit ) ->
  std_logic:( ( Std_logic.t -> t ) Variantslib.Variant.t -> Base.unit ) ->
  std_logic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t -> Base.unit ) ->
  std_ulogic:( ( Std_logic.t -> t ) Variantslib.Variant.t -> Base.unit ) ->
  std_ulogic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t -> Base.unit ) ->
  string:( ( Base.string -> t ) Variantslib.Variant.t -> Base.unit ) ->
  Base.unit

val map : 
  t ->
  bit:( ( Base.bool -> t ) Variantslib.Variant.t -> Base.bool -> 'result__ ) ->
  bit_vector:
    ( ( Bit_vector.t -> t ) Variantslib.Variant.t ->
      Bit_vector.t ->
      'result__ ) ->
  bool:( ( Base.bool -> t ) Variantslib.Variant.t -> Base.bool -> 'result__ ) ->
  int:( ( Base.int -> t ) Variantslib.Variant.t -> Base.int -> 'result__ ) ->
  real:( ( Base.float -> t ) Variantslib.Variant.t -> Base.float -> 'result__ ) ->
  std_logic:
    ( ( Std_logic.t -> t ) Variantslib.Variant.t -> Std_logic.t -> 'result__ ) ->
  std_logic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t ->
      Std_logic_vector.t ->
      'result__ ) ->
  std_ulogic:
    ( ( Std_logic.t -> t ) Variantslib.Variant.t -> Std_logic.t -> 'result__ ) ->
  std_ulogic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t ->
      Std_logic_vector.t ->
      'result__ ) ->
  string:
    ( ( Base.string -> t ) Variantslib.Variant.t -> Base.string -> 'result__ ) ->
  'result__

val make_matcher : 
  bit:
    ( ( Base.bool -> t ) Variantslib.Variant.t ->
      'acc__0 ->
      ( Base.bool -> 'result__ ) * 'acc__1 ) ->
  bit_vector:
    ( ( Bit_vector.t -> t ) Variantslib.Variant.t ->
      'acc__1 ->
      ( Bit_vector.t -> 'result__ ) * 'acc__2 ) ->
  bool:
    ( ( Base.bool -> t ) Variantslib.Variant.t ->
      'acc__2 ->
      ( Base.bool -> 'result__ ) * 'acc__3 ) ->
  int:
    ( ( Base.int -> t ) Variantslib.Variant.t ->
      'acc__3 ->
      ( Base.int -> 'result__ ) * 'acc__4 ) ->
  real:
    ( ( Base.float -> t ) Variantslib.Variant.t ->
      'acc__4 ->
      ( Base.float -> 'result__ ) * 'acc__5 ) ->
  std_logic:
    ( ( Std_logic.t -> t ) Variantslib.Variant.t ->
      'acc__5 ->
      ( Std_logic.t -> 'result__ ) * 'acc__6 ) ->
  std_logic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t ->
      'acc__6 ->
      ( Std_logic_vector.t -> 'result__ ) * 'acc__7 ) ->
  std_ulogic:
    ( ( Std_logic.t -> t ) Variantslib.Variant.t ->
      'acc__7 ->
      ( Std_logic.t -> 'result__ ) * 'acc__8 ) ->
  std_ulogic_vector:
    ( ( Std_logic_vector.t -> t ) Variantslib.Variant.t ->
      'acc__8 ->
      ( Std_logic_vector.t -> 'result__ ) * 'acc__9 ) ->
  string:
    ( ( Base.string -> t ) Variantslib.Variant.t ->
      'acc__9 ->
      ( Base.string -> 'result__ ) * 'acc__10 ) ->
  'acc__0 ->
  ( t -> 'result__ ) * 'acc__10

val to_rank : t -> Base.int

val to_name : t -> Base.string

val descriptions : (Base.string * Base.int) Base.list