Module Parameter.Value

type t =
| Bit of Base.bool
| Bit_vector of Bit_vector.t
| Bool of Base.bool
| Int of Base.int
| Real of Base.float
| Std_logic of Std_logic.t
| Std_logic_vector of Std_logic_vector.t
| Std_ulogic of Std_logic.t
| Std_ulogic_vector of Std_logic_vector.t
| String of Base.string
include Sexplib0.Sexpable.S with type t := t
val t_of_sexp : Sexplib0__.Sexp.t -> t
val sexp_of_t : t -> Sexplib0__.Sexp.t
val bit : Base.bool -> t
val bit_vector : Bit_vector.t -> t
val bool : Base.bool -> t
val int : Base.int -> t
val real : Base.float -> t
val std_logic : Std_logic.t -> t
val std_logic_vector : Std_logic_vector.t -> t
val std_ulogic : Std_logic.t -> t
val std_ulogic_vector : Std_logic_vector.t -> t
val string : Base.string -> t
val is_bit : t -> Base.bool
val is_bit_vector : t -> Base.bool
val is_bool : t -> Base.bool
val is_int : t -> Base.bool
val is_real : t -> Base.bool
val is_std_logic : t -> Base.bool
val is_std_logic_vector : t -> Base.bool
val is_std_ulogic : t -> Base.bool
val is_std_ulogic_vector : t -> Base.bool
val is_string : t -> Base.bool
val bit_val : t -> Base.bool Base.option
val bit_vector_val : t -> Bit_vector.t Base.option
val bool_val : t -> Base.bool Base.option
val int_val : t -> Base.int Base.option
val real_val : t -> Base.float Base.option
val std_logic_val : t -> Std_logic.t Base.option
val std_logic_vector_val : t -> Std_logic_vector.t Base.option
val std_ulogic_val : t -> Std_logic.t Base.option
val std_ulogic_vector_val : t -> Std_logic_vector.t Base.option
val string_val : t -> Base.string Base.option
module Variants : sig ... end
include Base.Equal.S with type t := t
val equal : t Base__Equal.equal