Mixed_add (zprize.Msm_pippenger.Host_to_msm.Make.Top.Mixed

module Xyt : sig ... end

module Xyzt : sig ... end

module I : sig ... end

module O : sig ... end

val latency : Twisted_edwards_lib.Config.t -> int

val create : 
  ?build_mode:Hardcaml.Build_mode.t ->
  config:Twisted_edwards_lib.Config.t ->
  Hardcaml.Scope.t ->
  Hardcaml.Signal.t I.t ->
  Hardcaml.Signal.t O.t

val hierarchical : 
  ?build_mode:Hardcaml.Build_mode.t ->
  ?instance:string ->
  config:Twisted_edwards_lib.Config.t ->
  Hardcaml.Scope.t ->
  Hardcaml.Signal.t Hardcaml.Interface.Create_fn(I)(O).t