Window_ram.Make
module M : sig ... end
module I : sig ... end
module O : sig ... end
val window_to_partition : Hardcaml.Signal.t -> Hardcaml.Signal.t option
val create :
build_mode:Hardcaml.Build_mode.t ->
b_write_data:Hardcaml.Signal.t ->
Hardcaml.Scope.t ->
Hardcaml__Signal.t I.t ->
Hardcaml.Signal.t O.t
val hierarchical :
?instance:Base.string ->
b_write_data:Hardcaml.Signal.t ->
build_mode:Hardcaml.Build_mode.t ->
Hardcaml.Scope.t ->
Hardcaml.Signal.t I.t ->
Hardcaml.Signal.t O.t