With_interface (hardcaml.Hardcaml.Cyclesim.With

Parameters

module I : Interface.S

module O : Interface.S

type nonrec t = ( Bits.t Base.ref I.t, Bits.t Base.ref O.t ) t

val sexp_of_t : t -> Sexplib0.Sexp.t

val create : 
  ?config:Config.t ->
  ?circuit_config:Circuit.Config.t ->
  Circuit.With_interface(I)(O).create ->
  t

Create a simulator using the provided Create_fn. The returned simulator ports are coerced to the input and output interface types.

val coerce : t_port_list -> t

Coerce simulator port types to use the provided input and output interfaces.